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Backup/sp7 porting checkpoints#282

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rajaganeshr wants to merge 29 commits into
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Backup/sp7 porting checkpoints#282
rajaganeshr wants to merge 29 commits into
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Sync integ_sp8 with dev-a2

amd-knieman and others added 29 commits July 17, 2026 16:24
The send_uevent() function was using a devm function to allocate the
four uevent environment strings (SOURCE, BUS_NUM, PID, ADDRESS).
devm_* allocations are tied to the device's lifetime and are only freed
when the device is unregistered. As a result, each time an alert
occurred, new memory was allocated but not freed.

Replace devm allocator with a regular one, add error checking, and free
the memory at end.

kobject_uevent_env copies all envp_ext strings into its own internal
kobj_uevent_env buffer, so it is fine to free after the call.

Tested:
Flashed on a Nigeria unit. Monitored the udev event, and verified that
the property info match the kernel logs. The allocated kmalloc-192
slabs remained the same before and after the error injection.

Signed-off-by: Kyle Nieman <Kyle.Nieman@amd.com>
Backport of upstream commit ea34925. The HID gadget interrupt
endpoint bInterval was hard-coded (HS/SS=4 -> 1ms poll), forcing the
host xHCI to poll the (always-connected, non-suspendable) iKVM stub
keyboard ~1000x/sec over PCIe. That constant traffic prevents the host
AMD Data Fabric from reaching deep C-states, capping idle DFCS
residency at ~65%.

Add an "interval" configfs attribute so create_usbhid.sh can raise the
stub keyboard's poll interval (e.g. 16 -> ~4s at HS), drastically
cutting BMC->host PCIe wakeups while keeping the anti-suspend stub
(preserving the Windows KVM idle fix). Default behavior is unchanged
when "interval" is not written.

Upstream-Status: Inappropriate

Signed-off-by: Ashok Kumar <ashok2ku@amd.com>
Name LTPI alert strap and SPI boot-type GPIOs in AMD platfroms.

Use corrected mapping (P0=75, P1=77, P0=117, P1=119) and keep P1 names
only on dual-processor platforms.

Tested: Verified gpioinfo

Signed-off-by: Rajaganesh Rathinasabapathi <rrathina@amd.com>
To avoid JTAG driver hang add 1 sec time out to
wait_event_interruptible_timeout()

Tested:
- verified in Morocco in 24 hr test

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
Add support for handeling 2 DPC to SBRMI by reading the
DIMM ID from DTS.
SP7 only has 1 DPC.
but SP8 support 2 DPC.

Tested:
- tested in Kenya by chnaging Kenya DTS file

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
Add DIMM SPD and PMIC devices to SP7 platforms for
i3c2 (P0) and i3c3 (P1).
The i3c buses will run in i2c mode from BMC side.

Tested:
- verified in Congo and Morocco

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
This reverts commit f5e5fbc.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 868c5c8.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 2914126.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 287ff5e.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Since the static address may be zero, update the device
address based on the dynamic address.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Since the static address may be zero, update the device
address based on the dynamic address.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add device tree entries for Venice A0 to support 2P and 2X1P
  for RMI and TSI devices
- This will provide the dynamic address to be used by user space
  applicaitons

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add device tree entries for APML devices (RMI/TSI) for Venice
  AB/B0 platforms.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add I3C device IDs for the Venice AB/B0 and SP8 platforms,
  for RMI and TSI APML devices.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
in SP7 PRB systems:
- requested I²C mux driver to disconnect all downstream channels when idle.
- this will prevent HPM FRU Read corruption from PCIe cards on i2c-8

Tested:
- verified in SP7 PRB systems

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
All other SP7 platforms configured the static I3C addresses for SBRMI
and SBTSI I3C devices. Without this, P1 SBRMI and SBTSI will fail to
bind the driver.
```
 i3c_device_match_id: manuf 0x0, part 0x0, inst 0x0, ext_info 0x118
sbtsi_i3c 4-118: SBTSI: PID: 118
sbtsi_i3c 4-118: register sbtsi-9 device
APML: Registered SBTSI device at address 0x9
...
 i3c_device_match_id: manuf 0x0, part 0x100, inst 0x0, ext_info 0x118
sbtsi_i3c 5-1000118: SBTSI: PID: 1000118
sysfs: cannot create duplicate filename '/class/misc/sbtsi-9'
CPU: 2 PID: 30983 Comm: s0-state-mgr Tainted: G           O       6.6.92-dirty-9baaae4348bb-g9baaae4348bb #1
Hardware name: AMD Ghana PRB (DT)
Call trace:
 dump_backtrace+0xa0/0x11c
 show_stack+0x18/0x24
 dump_stack_lvl+0x48/0x60
 dump_stack+0x18/0x24
 sysfs_warn_dup+0x64/0x80
 sysfs_do_create_link_sd+0xf0/0xf8
 sysfs_create_link+0x20/0x40
 device_add+0x2fc/0x7ec
 device_create_groups_vargs+0xe0/0x134
 device_create_with_groups+0x58/0x84
 misc_register+0xd8/0x188
 create_misc_tsi_device+0x78/0xac
 sbtsi_i3c_probe+0x140/0x214
 i3c_device_probe+0x18/0x24
 really_probe+0x160/0x3d8
 __driver_probe_device+0x88/0x170
 device_driver_attach+0x48/0xac
 bind_store+0x7c/0xd0
 drv_attr_store+0x24/0x38
 sysfs_kf_write+0x44/0x54
 kernfs_fop_write_iter+0x134/0x1e0
 vfs_write+0x190/0x314
 ksys_write+0x70/0x108
 __arm64_sys_write+0x1c/0x28
 invoke_syscall.constprop.0+0x5c/0x100
 do_el0_svc+0xa8/0xc8
 el0_svc+0x40/0x128
 el0t_64_sync_handler+0x120/0x12c
 el0t_64_sync+0x190/0x194
sbtsi_i3c: probe of 5-1000118 failed with error -17
```

Statically set the I3C addresses for SBRMI/SBTSI for Ghana as well.

Tested:
Driver binding for Ghana now succeeds for P1 SBRMI and SBTSI.

Signed-off-by: Kyle Nieman <Kyle.Nieman@amd.com>
The `fan_sel_gpio` DTS configuration of `3` didn't properly handle the
fan pump controller for Ghana.

Add the `fan_sel_gpio` value of 255 for Ghana to indicate there is no
fan select as BMC is the only controller for the pump fans.

Properly configure PWM0 for P0 pump fans and PWM3 for P1 pump fans.

Tested:
Verified in Ghana. Could change the pump fan speed for P1. Setting the
PWM for P0 no longer causes P1 PWM to be set to 0.

Signed-off-by: Kyle Nieman <Kyle.Nieman@amd.com>
Alert_L dts changes added for:
- 1P: Eagle & Falcon
- 2P: Hornbill, Hornbill-mps and Seagull

Signed-off-by: Sathya Priya Kumar <sathyapriya.k@amd.com>
from Aspeed:
- jtag: aspeed: Support TCK type with u32
  Our JTAG hardware mode can only send a maximum TCK value of 1023, so it
  needs to be split into multiple steps to support the TCK type with u32.

AMD change:
- add u8 pad to the struct to put u32 tck on 16-bit boundary

Tested:
- verified in Morocco

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Signed-off-by: modolaty <mohsen.dolaty@amd.com>
Add new FS1606A driver to SP8 Seagull and Falcon Device Trees

Tested:
- verified in SP8 Seagull

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
Add new System VR FS1606 for SP8 PRBs Falcon and Seagull

Tested:
- verified in Falcon and Seagull

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
Enable MCTP over I3C for SP8 platforms

tested: verified on Eagle.

Signed-off-by: Mahesh Kurapati <mahesh.kurapati@amd.com>
SP8 PRB has FS1606 as System VRs
Received the new driver from Pegatron
Adding the new driver

Tested:
- verified in SP8 Falcon and Seagull

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
- Add device tree entries for APML devices (RMI/TSI) for SP8
  platforms.

Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Add DIMM SPD and PMIC devices to SP8 platforms for
i3c2 (P0) and i3c3 (P1).

Tested:
    - verified in Seagull

Signed-off-by: Rajaganesh Rathinasabapathi <rrathina@amd.com>
Hornbill MPS device Tree is a copy of Hornbill DTS plus
VR for VDDCR_CPU0, VDDCR_CPU1, and VDDIO has been changed
to MPS.

Tested:
- verified in Hornbill MPS

Signed-off-by: modolaty <mohsen.dolaty@amd.com>
- Add driver for TDA387XX
- DTS binding for TDA387XX on falcon
- Minor dts fixes

Verified on SP8 Falcon

Signed-off-by: Ryan Ilgen <Ryan.Ilgen@amd.com>
Resolve conflict fallout in Hornbill and Seagull DTS by restoring APML
node placement and label uniqueness to match integ_sp8 intent. This
removes duplicate_label dtc failures while preserving Alert_L and APML
topology.

Tested:
- bitbake obmc-phosphor-image (sp7)

Signed-off-by: Rajaganesh Rathinasabapathi <rrathina@amd.com>
@rajaganeshr
rajaganeshr force-pushed the backup/sp7-porting-checkpoints branch from 4ed3819 to b3a8464 Compare July 17, 2026 16:26
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7 participants