More cosmetic fixes and clean up

src/arch/xtensa/smp/idc.c

@@ -1,3 +1,32 @@
+/*
+ * Copyright (c) 2018, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *   * Neither the name of the Intel Corporation nor the
+ *     names of its contributors may be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
+ */
 
 #include <xtos-structs.h>
 #include <arch/cpu.h>
@@ -299,9 +328,10 @@ static uint32_t idc_get_done_bit_mask(int core)
 /**
  * \brief Initializes IDC data and registers for interrupt.
  */
-void arch_idc_init(void)
+int arch_idc_init(void)
 {
 	int core = arch_cpu_get_id();
+	int ret;
 
 	trace_idc("arch_idc_init()");
 
@@ -317,13 +347,17 @@ void arch_idc_init(void)
 	schedule_task_config(&(*idc)->idc_task, TASK_PRI_IDC, core);
 
 	/* configure interrupt */
-	interrupt_register(PLATFORM_IDC_INTERRUPT(core), IRQ_AUTO_UNMASK,
-			   idc_irq_handler, *idc);
+	ret = interrupt_register(PLATFORM_IDC_INTERRUPT(core), IRQ_AUTO_UNMASK,
+				 idc_irq_handler, *idc);
+	if (ret < 0)
+		return ret;
 	interrupt_enable(PLATFORM_IDC_INTERRUPT(core));
 
 	/* enable BUSY and DONE (only for master core) interrupts */
 	idc_write(IPC_IDCCTL, core,
 		  (*idc)->busy_bit_mask | (*idc)->done_bit_mask);
+
+	return 0;
 }
 
 /**

src/arch/xtensa/smp/include/arch/idc.h

@@ -43,7 +43,7 @@ void cpu_power_down_core(void);
 
 void idc_enable_interrupts(int target_core, int source_core);
 int arch_idc_send_msg(struct idc_msg *msg, uint32_t mode);
-void arch_idc_init(void);
+int arch_idc_init(void);
 void idc_free(void);
 
 #endif

src/arch/xtensa/smp/init.c

@@ -44,6 +44,7 @@
 #include <sof/init.h>
 #include <sof/lock.h>
 #include <sof/notifier.h>
+#include <sof/panic.h>
 #include <sof/schedule.h>
 #include <sof/task.h>
 #include <platform/idc.h>
@@ -131,7 +132,9 @@ int slave_core_init(struct sof *sof)
 
 	/* initialize IDC mechanism */
 	trace_point(TRACE_BOOT_PLATFORM_IDC);
-	idc_init();
+	err = idc_init();
+	if (err < 0)
+		return err;
 
 	trace_point(TRACE_BOOT_PLATFORM);
 

src/arch/xtensa/up/include/arch/idc.h

@@ -51,6 +51,6 @@ static inline int arch_idc_send_msg(struct idc_msg *msg,
 /**
  * \brief Initializes IDC data and registers for interrupt.
  */
-static inline void arch_idc_init(void) { }
+static inline int arch_idc_init(void) { return 0; }
 
 #endif

src/arch/xtensa/up/init.c

@@ -36,7 +36,6 @@
 #include <arch/task.h>
 #include <sof/init.h>
 #include <sof/lock.h>
-#include <sof/panic.h>
 #include <stdint.h>
 
 /**

src/audio/host.c

@@ -298,7 +298,7 @@ static int host_trigger(struct comp_dev *dev, int cmd)
 		ret = dma_stop(hd->dma, hd->chan);
 		if (ret < 0)
 			trace_host_error("host_trigger(): dma stop failed: %d",
-					 ret)
+					 ret);
 #endif
 		break;
 	case COMP_TRIGGER_START:

src/drivers/intel/cavs/dmic.c

@@ -383,14 +383,11 @@ static void find_modes(struct decim_modes *modes, uint32_t fs, int di)
 		 * is possible. Then check that CIC decimation constraints
 		 * are met. The passed decimation modes are added to array.
 		 */
-		j = 0;
-		/* Loop until NULL */
-		while (fir_list[j]) {
+		for (j = 0; fir_list[j]; j++) {
 			mfir = fir_list[j]->decim_factor;
-			j++;
 
 			/* Skip if previous decimation factor was the same */
-			if (j > 2 && fir_list[j - 2]->decim_factor == mfir)
+			if (j > 1 && fir_list[j - 1]->decim_factor == mfir)
 				continue;
 
 			mcic = osr / mfir;
@@ -404,11 +401,12 @@ static void find_modes(struct decim_modes *modes, uint32_t fs, int di)
 				modes->mcic[i] = mcic;
 				modes->mfir[i] = mfir;
 				i++;
-				modes->num_of_modes = i;
 			}
-
 		}
 	}
+
+	modes->num_of_modes = i;
+
 #if defined MODULE_TEST
 	printf("# Found %d modes\n", i);
 #endif
@@ -1239,7 +1237,7 @@ static int dmic_set_config(struct dai *dai, struct sof_ipc_dai_config *config)
 		   cfg.clkdiv, cfg.mcic);
 	trace_dmic("dmic_set_config(), cfg mfir_a = %u, mfir_b = %u",
 		   cfg.mfir_a, cfg.mfir_b);
-	trace_dmic("dmic_set_config(), cfg cic_shift = %u", cfg.cic_shift)
+	trace_dmic("dmic_set_config(), cfg cic_shift = %u", cfg.cic_shift);
 	trace_dmic("dmic_set_config(), cfg fir_a_shift = %u, "
 		   "cfg.fir_b_shift = %u", cfg.fir_a_shift, cfg.fir_b_shift);
 	trace_dmic("dmic_set_config(), cfg fir_a_length = %u, "

src/drivers/intel/cavs/ipc.c

@@ -85,10 +85,11 @@ static void ipc_irq_handler(void *arg)
 
 	/* new message from host */
 #if CAVS_VERSION == CAVS_VERSION_1_5
-	if (dipct & IPC_DIPCT_BUSY && dipcctl & IPC_DIPCCTL_IPCTBIE) {
+	if (dipct & IPC_DIPCT_BUSY && dipcctl & IPC_DIPCCTL_IPCTBIE)
 #else
-	if (dipctdr & IPC_DIPCTDR_BUSY && dipcctl & IPC_DIPCCTL_IPCTBIE) {
+	if (dipctdr & IPC_DIPCTDR_BUSY && dipcctl & IPC_DIPCCTL_IPCTBIE)
 #endif
+	{
 		/* mask Busy interrupt */
 		ipc_write(IPC_DIPCCTL, dipcctl & ~IPC_DIPCCTL_IPCTBIE);
 
@@ -112,10 +113,11 @@ static void ipc_irq_handler(void *arg)
 
 	/* reply message(done) from host */
 #if CAVS_VERSION == CAVS_VERSION_1_5
-	if (dipcie & IPC_DIPCIE_DONE && dipcctl & IPC_DIPCCTL_IPCIDIE) {
+	if (dipcie & IPC_DIPCIE_DONE && dipcctl & IPC_DIPCCTL_IPCIDIE)
 #else
-	if (dipcida & IPC_DIPCIDA_DONE) {
+	if (dipcida & IPC_DIPCIDA_DONE)
 #endif
+	{
 		/* mask Done interrupt */
 		ipc_write(IPC_DIPCCTL,
 			  ipc_read(IPC_DIPCCTL) & ~IPC_DIPCCTL_IPCIDIE);
@@ -143,22 +145,17 @@ void ipc_platform_do_cmd(struct ipc *ipc)
 
 	/* perform command and return any error */
 	err = ipc_cmd();
-	if (err > 0) {
-		goto done; /* reply created and copied by cmd() */
-	} else if (err < 0) {
-		/* send std error reply */
+
+	/* if err > 0, reply created and copied by cmd() */
+	if (err <= 0) {
+		/* send std error/ok reply */
 		reply.error = err;
-	} else if (err == 0) {
-		/* send std reply */
-		reply.error = 0;
-	}
 
-	/* send std error/ok reply */
-	reply.hdr.cmd = SOF_IPC_GLB_REPLY;
-	reply.hdr.size = sizeof(reply);
-	mailbox_hostbox_write(0, &reply, sizeof(reply));
+		reply.hdr.cmd = SOF_IPC_GLB_REPLY;
+		reply.hdr.size = sizeof(reply);
+		mailbox_hostbox_write(0, &reply, sizeof(reply));
+	}
 
-done:
 	ipc->host_pending = 0;
 
 	/* are we about to enter D3 ? */

src/include/sof/audio/kpb.h

@@ -39,8 +39,8 @@
 
 /* KPB tracing */
 #define trace_kpb(__e, ...) trace_event(TRACE_CLASS_KPB, __e, ##__VA_ARGS__)
-#define trace_kpb_error(__e, ...) (trace_error(TRACE_CLASS_KPB, __e, \
-					      ##__VA_ARGS__))
+#define trace_kpb_error(__e, ...) trace_error(TRACE_CLASS_KPB, __e, \
+					      ##__VA_ARGS__)
 #define tracev_kpb(__e, ...) tracev_event(TRACE_CLASS_KPB, __e, ##__VA_ARGS__)
 /* KPB internal defines */
 #define KPB_MAX_BUFF_TIME 2100 /**< time of buffering in miliseconds */

src/include/sof/dma.h

@@ -223,7 +223,7 @@ struct dma *dma_get(uint32_t dir, uint32_t caps, uint32_t dev, uint32_t flags);
 void dma_put(struct dma *dma);
 
 #define dma_set_drvdata(dma, data) \
-	dma->private = data;
+	do { dma->private = data; } while (0)
 #define dma_get_drvdata(dma) \
 	dma->private
 #define dma_base(dma) \

src/include/sof/math/numbers.h

@@ -35,8 +35,16 @@
 
 #include <stdint.h>
 
-#define MIN(a, b) (((a) < (b)) ? (a) : (b))
-#define MAX(a, b) (((a) > (b)) ? (a) : (b))
+#define MIN(a, b) ({		\
+	typeof(a) __a = (a);	\
+	typeof(b) __b = (b);	\
+	__a > __b ? __b : __a;	\
+})
+#define MAX(a, b) ({		\
+	typeof(a) __a = (a);	\
+	typeof(b) __b = (b);	\
+	__a < __b ? __b : __a;	\
+})
 
 int gcd(int a, int b); /* Calculate greatest common divisor for a and b */
 

src/include/sof/trace.h

@@ -124,13 +124,13 @@ extern int test_bench_trace;
 char *get_trace_class(uint32_t trace_class);
 #define _log_message(mbox, atomic, level, comp_class, id_0, id_1,	\
 		     has_ids, format, ...)				\
-{									\
+do {									\
 	if (test_bench_trace) {						\
 		char *msg = "%s " format;				\
 		fprintf(stderr, msg, get_trace_class(comp_class),	\
 			##__VA_ARGS__);					\
 	}								\
-}
+} while (0)
 #endif
 
 #define _TRACE_EVENT_NTH_PARAMS(id_count, param_count)			\
@@ -348,11 +348,11 @@ _thrown_from_macro_BASE_LOG_in_trace_h
 
 #define __log_message(func_name, lvl, comp_class, id_0, id_1, has_ids,	\
 		      format, ...)					\
-{									\
+do {									\
 	_DECLARE_LOG_ENTRY(lvl, format, comp_class,			\
 			   PP_NARG(__VA_ARGS__), has_ids);		\
 	BASE_LOG(func_name, id_0, id_1, &log_entry, ##__VA_ARGS__)	\
-}
+} while (0)
 
 #define _log_message(mbox, atomic, level, comp_class, id_0, id_1,	\
 		     has_ids, format, ...)				\